1. Arm64-bit register rules

The arm64-bit parameter call rules follow AAPCS64 and stipulate that the stack is full descending.

Register invocation rules are as follows:

X0-x7: used for passing subroutine parameters and results, do not need to save when using, redundant parameters are passed by stack, 64 bit return result is X0, 128 bit return result is X1:X0. X8: Used to save subroutine return address, try not to use. X9-x15: A temporary register that does not need to be saved when used. X16-x17: subroutine internal call register, use do not need to save, try not to use. X18: Platform register. Use of this register is platform dependent and should be avoided as much as possible. X19-x28: A temporary register that must be saved when used. X29: Frame pointer register, used to connect stack frames, need to save when used. X30: link register LR X31: stack pointer register SP or zero register ZXR Note: Registers that must be saved when a subroutine is called are x19-X29 and SP(X31). Registers you do not need to save: X0-X7,X9-X15

CPSR status register. NZCV is a status register with condition flags of, respectively, representing the states generated during the operation. N: Generally, the result of the operation is negative. Z: when the instruction result is 0, Z= 1; otherwise, Z=0; C: if the unsigned operation has an overflow, C=1. V: if the signed operation has an overflow, V =1

2. Data definition directives

DCB, DCW, DCD and DCQ are used to allocate a memory unit and initialize the memory unit. DCB allocates a byte of memory, with each operand following it occupying one byte. DCW allocates a half-word memory unit, with each operand following it occupying two bytes. DCD allocates a byte of memory with each operand following it occupying 4 bytes. DCQ allocates a dual-word memory unit, with each operand following it occupying 8 bytes.

GBLL declares and initializes a global logic variable with FALSE. GBLS declares and initializes a global string variable with null. LCLA declares and initializes a local arithmetic variable. LCLL declares and initializes a local logical variable with the initial value FALSE. LCLS declares and initializes a local string variable with the initial value null. SETA sets the value of a local or global arithmetic variable. SETL sets the value of a local or global logical variable. SETS SETS a local or global string variable. RLIST names a set of registers CN names a coprocessor register CP names a particular coprocessor, Coprocessor numbers 0-15 DN Give a double precision VFP register a name SN give a single precision VFP register a name FN Give a particular floating-point register a name DCFD assigns a double precision floating-point number a section of memory that begins with a word boundary. DCFDU allocates a segment of memory beginning with an arbitrary boundary to a double – precision floating point number. DCFS allocates a single precision floating point number to an area of memory that begins at a word boundary. DCFSU allocates a single precision floating point number to an area of memory starting with an arbitrary boundary. SPACE always allocates a memory unit and initializes it with 0.

The ARM assembler has predefined registers for ARM. The predefined registers are r0-R5 and R0-R15 A1-A4 (parameter, result or temporary register, synonymous with R0-R3) V1-V8 (variable register, synonymous with R4-R11) SB and SB (Static base address register, Synonymous with R9) SL and SL (stack limit register, synonymous with R10) FP and FP (frame pointer, synonymous with R11) IP and IP temporary registers in procedure calls, synonymous with R12 SP and SP, stack pointer, synonymous with R13 LR and LR, link register, synonymous with R14 PC and PC program counter, Equivalent to R15 CPSR and CPSR Program status register SPSR and SPSR Program status register F0-F7 and F0-F7 FPA register S0-S31 and S0-S31 VFP single precision register D0-D15 and D0-D15 VFP double precision register P0-P15 Coprocessor 0-15 C0-C15 Coprocessor register 0-15

PUSH {r4-R7,LR} means R4-R7,LR (linker) PUSH register PUSH and out of the stack instructions are as follows; PUSH {R0-R7,LR} ; POP {r0-r7,PC}; Pops data from the stack into low registers R0, R7, and PC

LDR instruction format:

LDR R0, [R1]

LDR R0, =NAME

LDR R0, =0X123

For the first case without an equal sign, the data corresponding to the address in register R1 is fetched and put into R0

In the second case with an equal sign, the value of the R0 register will be the address of the NAME label.

For the third case with an equal sign, the value of register R0 will be the value of the immediate number LDR IP,[sp],#4 save sp contents into IP, then sp=sp+4; [sp,#4] [sp,#4] [sp,#4] [sp,#4] [sp,#4] Sp =sp+4; sp=sp+4; sp=sp+4; sp=sp+4; sp=sp+4; sp=sp+4; STR IP,[sp,#4] STR IP,[sp,#4] STR IP,[sp,#4] STR IP,[sp,#4] Sp =sp+4 assigns the value of the new address to sp

Example command: STR R0, [R1], # 8; Write the word data in R0 to memory at the address R1, and write the new address R1+8 to R1. STR R0, [R1, # 8]; Write word data in R0 to memory at address R1+8.” STR r1, (r0); Transfer the value of register R1 to memory with address value R0