This is the 27th day of my participation in the August Genwen Challenge.More challenges in August

STM8 microcontroller although it is 8 microcontroller, but the function is still very powerful, today to realize the analog watchdog function of STM8 microcontroller ADC.

The official introduction is as follows:

The function of the watchdog is well known, but what is this simulated watchdog? To put it simply, the analog watchdog can monitor the ADC sampled data in real time. When the sampled data value is less than the set minimum value or greater than the set maximum value, the microcontroller will trigger the ADC interrupt. This is very practical in temperature monitoring. For example, when the temperature value of the device is not in the set range, the interruption will be triggered automatically, without the need for the program to collect the value of the ADC channel all the time, and then use the software to judge whether the current temperature value exceeds the normal range. Among them, simulated watchdog can be used in single mode and continuous mode. In the previous article, the use of simulated watchdog in single sampling mode was introduced. Now let’s introduce the use method of simulated watchdog in continuous sampling mode.

#include "adc.h"
#include "main.h"

u16  DATAH = 0;                          //ADC converts 8 bits higher
u16  DATAL = 0;                          //ADC converts 8 bits lower
_Bool ADC_flag = 0;                     //ADC conversion success flag

// The AD channel pin is initialized
void ADC_GPIO_Init( void )
{
    PD_DDR &= ~( 1 << 3 );              //PD3 is set to input current
    PD_CR1 &= ~( 1 << 3 );              //PD3 is set to dangling input
}
void ADC_CH_Init( u8 ch )
{
    char l = 0;
    ADC_CR1  = 0x00;                    //fADC = fMASTER/2, 8Mhz single conversion, no conversion
    ADC_CR1 |= ( 1 << 1 );              // Enable continuous conversion mode
    ADC_CSR  = ch;                      // Select AD input channel such as PD2(AIN3)
    ADC_CR2  = 0x00;                    // By default, data is read high and low first
    ADC_TDRL = ( 1 << ch );             // Disable schmidt trigger function 1 of corresponding channel by ch+1 bit
    ADC_CR1 |= 0x01;                    // Enable ADC and start conversion
    
     // Set the upper threshold value
    ADC_HTRH = ( u8 )( 800 >> ( u8 )2 );    // Store the top 8 bits of 10 bits of data
    ADC_HTRL = ( u8 )800;                   // Store the lower 2 bits of 10 bits of data

    // Set the lower threshold
    ADC_LTRH = ( u8 )( 300 >> ( u8 )2 );    // Store the top 8 bits of 10 bits of data
    ADC_LTRL = ( u8 )300;                   // Store the lower 2 bits of 10 bits of data

    ADC_CSR |= 0x10;              // Enable watchdog interrupt
    
    for( l = 0; l < 100; l++ );         // Delay to ensure that the ADC module is powered on for at least 7us
    ADC_CR1 = ADC_CR1 | 0x01;           // Again enable ADC at the lowest position 1 of register CR1 and begin conversion
}

// Collect PD2 voltage
u16 ReadVol_CH3( void )
{
    u16 voltage = 0;

    while( ( ADC_CSR & 0x80) = =0 );      // Wait for the conversion to finish
    if( ADC_CSR & 0x80 )
    {
        ADC_CSR &= 0x7F;
        DATAH = ADC_DRH;                    // Read the high 8 bits of the ADC result
        DATAL = ADC_DRL;                    // Read the lower 8 bits of the ADC result
        voltage = ( DATAH << 2 ) + DATAL ; // Get ten digit precision data 0--1024
    }
    return voltage;
}

//AD interrupt service function Interrupt number 22
#pragma vector = 24                     // Interrupt number in IAR, add 2 to interrupt number in STVD
__interrupt void ADC_Handle( void )
{
    ADC_CSR &= ~0x40;
}
Copy the code

Set the watchdog upper limit in the ADC_HTR register, set the watchdog lower limit in the ADC_LTR register, and then set the AWDIE bit in the ADC_CSR register to 1, that is, enable the simulated watchdog interrupt function. The entrance of ADC analog watchdog interrupt program and the entrance of ADC sampling interrupt program are the same. Here, ADC uses the query mode and does not open the interrupt, so only the analog watchdog triggers the interrupt. After entering the interrupt, it is necessary to manually clear the AWD bit in the ADC_CSR register. When the simulated watchdog interrupt occurs, this bit will be set to 1. It is necessary to clear 0 by software.

The simulated watchdog is used almost exactly the same in continuous conversion mode as in single conversion mode.

It is important to note here that when setting the values of the upper and lower registers of the watchdog, the high register stores the upper 8 bits of the 10 bits of data, and the low data stores the lower 2 bits of the 10 bits of data. The setting of these four registers should refer to the official English version of ST, not the official Chinese version, because the introduction of these four registers in the Chinese version is wrong.