The status register CPSR

There is a special kind of register inside the CPU, which in ARM is called the state register, or CPSR register. The CPSR register is different from other registers in that other registers are used to store data, while the CPSR register works by bit. Each bit in the CPSR register has a special meaning and records specific information.

The CPSR register is 32 bits

The lower 8 bits of the CPSR (including I, F, T, and M[4:0]) are called the control bits and cannot be modified by a program unless the CPU is running in privileged mode!

The 8 to 27 bits are reserved for later expansion

N, Z, C, and V are all conditional code flag bits. Their contents can be changed by the results of arithmetic or logical operations, and can determine whether an instruction is executed or not! Significant!

N flag bit

The 31st bit in CPSR is the N flag bit, which records whether the result is negative after the execution of the relevant instruction. If it is negative, the N flag bit is 1; if it is non-negative, the N flag bit is 0

Practice:

- (void)viewDidLoad { [super viewDidLoad]; int a = 10; int b = 20; If (a > b) {printf("a > b\n"); }else{ printf("error\n"); }}Copy the code

Then run the program. When the program runs to the breakpoint position, step into the judgment, and then execute step by step. After executing the judgment condition, print the value of CPSR:

(lldb) register read cpsr
    cpsr = 0x80000000
Copy the code

Then, after converting the CPSR value to binary, it is found that the N flag bit is 1, that is to say, the result is negative, so it is determined to print the else statement. In order to verify whether flag bit N affects the judgment result, we re-run the project according to the above steps. When it comes to judgment, we modify it by changing the value of CPAR to 0x20000000. At this time, the value of flag bit N is 0, indicating that the result is non-negative.

(lldb) register read cpsr cpsr = 0x80000000 (lldb) register write cpsr 0x20000000 (lldb) register read cpsr cpsr = 0x20000000 A is greater than BCopy the code

From the above results, it can be verified whether the result is negative after the operation of relevant instructions affected by N bits

Z flag bit

The 30th bit of CPSR is the Z flag bit. It records whether the result is 0 after the relevant instruction is executed. If the result is 0, then Z = 1. If it’s not 0, then Z is equal to 0.

Practice:

- (void)viewDidLoad { [super viewDidLoad]; int a = 10; int b = 20; If (a == b) {printf("a = b\n"); }else{ printf("error\n"); }}Copy the code

The judgment condition is changed to whether a and B are equal, which is not equal in normal logic. Then we continue to follow the previous steps. After the logical judgment is completed, we modify the Z flag bit of CPSR before the result is returned, and the result is as follows:

(lldb) register read cpsr cpsr = 0x80000000 (lldb) register write cpsr 0x40000000 (lldb) register read cpsr cpsr = 0x40000000 A equals BCopy the code

So again we verify the Z flag bit

C sign a

Bit 29 of the CPSR is C, the carry flag bit. In general, unsigned numbers are performed. Addition operation: C=1 if the operation results in a carry (unsigned overflow), otherwise C=0. Subtraction operations (including CMP) : C=0 when a debit occurs (unsigned overflow), otherwise C=1.

Carry: We know that when two pieces of data are added together, it is possible to produce a carry from the most significant bit to a higher one. For example, two 32-bit bits of data: 0xAAAAaAAA + 0xAAAAaAAA will produce a carry. Since the carry value cannot be stored in 32 bits, we simply say that the carry value is lost. In fact, the CPU does not discard the carry system, but records it in a special register. ARM uses C bits to record the carry value

Dislocation: When two pieces of data are subtracted, it is possible to borrow higher. For another example, two 32-bit data: 0x00000000-0x000000FF will generate a debit. After the debit, it is equivalent to calculating 0x100000000-0x000000FF. I get the value 0xffffFF01. Since we borrowed one bit, the C bit is used to mark the borrowing. C = 0.

The V sign a

Bit 28 of the CPSR is V, the overflow flag bit. When a signed number operation is performed, if it exceeds the range that the machine can identify, it is called an overflow.

Positive + positive overflow for negative numbers

Negative + negative is positive overflow

Positive and negative numbers cannot overflow