Part 6 – Overview of the Linux ARM assembly instruction set
ARM instruction set can be divided into jump instruction, data processing instruction, program state register transfer instruction, Load/Store instruction, coprocessor instruction and abnormal interrupt generation instruction.
The ARM command length is a fixed 32 bits. Typical ARM instruction encoding format is as follows:
Opcode: Instruction operator encoding
Cond is the conditional encoding of instruction execution
S is the value that determines whether the operation of the instruction affects the CPSR
Rd Target register code
Rn contains the register code of the first operand
Shifter_operand: indicates the second operand.
Condition code
The conditional code cond is four bits.
Reference:
Developer.arm.com/docs/den002…
Addressing mode of ARM instruction
The main types are as follows:
- The way operands of data processing instructions are addressed
- Address for word and unsigned byte Load/Store instructions
- Addressing for miscellaneous Load/Store instructions
- Batch Load/Store instruction addressing mode
- The addressing mode of the Load/Store instruction of the coprocessor.
Storage access instruction:
LDR
Load data from memory into registers.
STR
Stores data to a specified storage unit.
LDM
Loads multiple data from the specified storage unit into a register list.
STM
Stores the data of a register list of data to the specified storage location.
PUSH
Push the register onto the full decrement stack.
POP
Eject data from decrement stack to register.
SWP
Used for data exchange between registers and memory.
ADD the sample
This works on 32 if it’s 64 bits if bx LR needs to be replaced.
.text.globl main main: add r0,r0, #1 // w0<-w0 + 1 bx lr |
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as -g -o add.o add.s
gcc -o add add.o
64-bit bits:
.arch armv8-a.global _start.text_start:add x0,x0, #1 mov x8, 93 svc 0 |
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as -g -o add.o add.s
gcc -o add add.o
Jump instruction
There are two ways to jump programs in ARM:
- Jump instruction
- Write the destination address value directly to the PC register (R15).
Directly write the target address value into the PC register, you can realize arbitrary jump in the 4GB address space, this jump instruction is also called long jump.
You can also jump from the current instruction forward or backward 32MB of address space. There are four types of jump commands:
B: Jump instruction
BL: jump instruction to be returned
BLX: jump instruction with return and state switching
BX: indicates the jump instruction to be switched
System instructions
Mnemonic | Instruction |
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MSR | Move general-purpose register to System Register allows the PE to write an AArch64 System register from a general-purpose register. |
MRS | Move System Register allows the PE to read an AArch64 System register into a general-purpose register. |
SVC | Supervisor Call causes an exception to be taken to EL1. |
NOP | No Operation does nothing, other than advance the value of the program counter by 4. This instruction can be used for instruction alignment purposes. |