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In the internal registers of CPU, there is a special register (the number and structure may be different for different processors). This register exists in ARM and is called the status register, which is the Current Program Status Register (CPSR) register. CPSR is different from other registers, which are used to store data and have a single meaning, while CPSR registers are bitwise, that is, each bit of CPSR has a special meaning and records specific information.

Note: the CPSR register is 32 bits

  • The lower 8 bits of the CPSR (including I, F, T, and M[4:0]) are called the control bits and cannot be modified by a program unless the CPU is running in privileged mode!
  • N, Z, C, and V are all conditional code flag bits. Their contents can be changed by the results of arithmetic or logical operations, and can determine whether an instruction is executed or not! Significant!

N indicates Negative

Bit 31 of the CPSR is N, the symbol flag bit. It records whether the result is negative after the relevant instruction is executed, if it is negative N=1, if it is non-negative N=0.

Note that in the ARM64 instruction set, some instructions that affect the status register, such as add/sub/ OR, are mostly operational instructions (performing logical or arithmetic operations).

Z (Zero)

The 30th bit of CPSR is the Z and 0 flag bit. It records whether the result is 0 after the relevant instruction is executed, if the result is 0, then Z=1, if the structure is not 0, then Z=0.

For the value of Z, we can look like this: Z marks whether the calculation result of the relevant instruction is 0. If it is 0, Z should record the positive information like “yes 0”. In the computer, 1 represents logical truth, which means affirmative. If the result is not 0, Z should record negative information such as “not 0”. In the computer, 0 means logical false, indicating negative, so when the result is not 0, Z=0, indicating “the result is not 0”.

C (Carry) flag

Bit 29 of the CPSR is C, the carry flag bit. In general, unsigned numbers are performed. Addition operation: C=1 if the operation results in a carry (unsigned overflow), otherwise C=0. Subtraction operations (including CMP) : C=0 when a debit occurs (unsigned overflow), otherwise C=1.

For an unsigned number of bit bits N, the highest bit of the corresponding binary information, namely the n-1 bit, is its most significant bit, and the imaginary NTH bit is the higher bit equivalent to the most significant bit.

carry

We know that when two pieces of data are added, it is possible to produce a carry from the most significant bit to a higher one. For example, two 32-bit bits of data: 0xAAAAaAAA + 0xAAAAaAAA will produce a carry. Since the carry value cannot be stored in 32 bits, we simply say that the carry value is lost. In fact, the CPU does not discard the carry value, but records it in a special register. Under ARM is the C bit to record the carry value. For example, the following command:

Mov w0, xaaaaaaaa # 0; The binary of 0xA is 1010 adds W0,w0,w0; After execution equals 1010 << 1 carry 1 (unsigned overflow) so C is marked with 1 adds W0,w0,w0; After execution equals 0101 << 1 carry 0 (unsigned without overflow) so C is marked with 0 adds W0,w0,w0; Repeat the above to add W0,w0,w0Copy the code

A borrow

When you subtract two numbers, it’s possible to borrow higher. For another example, two 32-bit data: 0x00000000-0x000000FF will generate a debit, which is equivalent to calculating 0x100000000-0x000000FF to get 0xFFFF01. The C bit is used to mark the borrowing due to the following bit. C=0. For example:

mov w0,#0x0
subs w0,w0,#0xff ;
subs w0,w0,#0xff
subs w0,w0,#0xff
Copy the code

V (Overflow) Indicates the Overflow flag

The 28th bit of CPSR, V, overflows the flag bit. When a signed number operation is performed, if it exceeds the range recognized by the machine, it is called overflow.

  • Positive + positive overflow for negative numbers
  • Negative + negative is positive overflow
  • Positive and negative numbers cannot overflow