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To build a complete CPU, connect the two functions of instruction and computation.
1 Instruction Cycle
The execution of each instruction by a computer can be broken down into the following steps:
- Fetch (Fetch instruction)
The process of placing instructions in storage and retrieving them through PC registers and instruction registers, operated by the Control Unit. From PC find corresponding instruction address register, according to the instruction address the specific instructions from memory is loaded into the instruction register, then 2 PCS register on the Decode (instruction Decode) according to the inside of the instruction register instruction, parsed into how to operation, is one which of the R, I, J instruction, which registers, data specific to operate or memory address. This phase is also performed by the controller. Execute (Execute commands) Execute specific commands such as R, I, and J to perform arithmetic logic operations, data transmission, or direct address jump. Both arithmetic operations, r-type instructions for logical operations, and i-type instructions for data transmission and conditional branching are operated by arithmetic logic units (ALU), that is, processed by arithmetic machines. If it is a simple unconditional address jump, it can be done directly in the controller, without the need for arithmetic. 4. Repeat 1 to 3
This is a perpetual motion machine “FDE” loop, or instruction cycle.
Machine Cycle, Machine Cycle or CPU Cycle
CPU internal operations are fast, but access to memory is much slower. Each instruction needs to be loaded from memory, so the minimum time to read an instruction from memory is called the CPU cycle.
Clock Cycle, machine frequency
One CPU cycle, usually accumulated by several clock cycles. A CPU Cycle time is the sum of these Clock cycles.
For an instruction cycle, it takes at least two CPU cycles to fetch an instruction and then execute it:
- Fetching instructions takes at least one CPU cycle
- It takes at least one CPU cycle to execute instructions
Because we’re going to have to write it back to memory
The relationship between three cycles
2. Establish a data path
It doesn’t really matter what the name is. A data path can be thought of as our processor unit, usually made up of two types of components:
- Operational elements, also known as Combinational elements, are ALU
Given a particular input, a particular output is generated according to the logic of the following combined circuit.
- Storage Element, also called State Element
Such as in the calculation process to be used in the register, whether general register or state register, are storage components.
Through the data bus to connect them, can complete data storage, processing and transmission, that is, the establishment of a data path.
The controller
You can think of it as just mechanically repeating the first two steps of the “coat-decode – Execute” loop, and then handing off the last step, the control signal generated by the controller, to the ALU.
The controller interprets CPU instructions into different output signals
Currently, the Intel CPU supports more than 2000 instructions. Note The controller outputs control signals in at least 2000 different combinations.
The ALU and various combinational logic circuits in the arithmetic unit can be considered as a fixed function circuit. What the controller “translates” is different control signals that tell the ALU to do different calculations. It is the controller that allows us to “program” functions, creating the “stored program computer”.
- The instruction decoder parses the input machine code into different opcodes and operands, and then transmits them to ALU for calculation
3 CPU requirements on hardware circuits
Build CPU, but also in the digital circuit level, to achieve the following functions.
ALU
It’s a stateless first circuit that computes the output from the input.
A circuit element – register that supports state reading and writing
Have a circuit that can store the results of the last calculation.
The calculation results are not necessary to be used by downstream circuits immediately, but can be used directly when needed. Common circuits that support state read and write:
- Latch
- D Flip-flop circuit (Data/Delay flip-flop)
Automatic “circuit, according to a fixed period to achieve PC register autoincrement
Fetch – Decode – Execute is automatically executed.
Our program does not operate by manually flipping a switch. There would have to be an “automatic” circuit, executing instructions endlessly.
Seemingly complex various function calls, conditional jumps, just modify the PC register stored address. As soon as the address inside the PC register is modified, the computer can load an instruction new instruction and run down. PC registers are also called program counters, which count continuously over time. When the number gets bigger, a new instruction is executed. So, what we need is an automatic counting circuit.
Decoding circuit
Whether decode instructions, or for the memory address to obtain the corresponding data or instructions, through a circuit to find the corresponding data, is the “decoder” circuit.
These four types of circuits can be put together in various ways to form a CPU. To implement the middle two of these four circuits, we also need the coordination of clock circuits. In the next section, we’ll take a look at how these basic circuit functions are implemented and how they can be combined into a CPU.
conclusion
At this point, the data path and controller required for CPU operation are introduced, and the four basic circuits needed to complete these functions are also identified:
- Combinatorial logic circuits such as THE ALU
- Latch and D – trigger circuit for storing data
- Realize the counter circuit of PC register
- Decoder circuit for decoding and addressing
The CPU is like a machine that never stops reading the next instruction to run. Why is the CPU still fully loaded and Idle?
The idle process in the operating system kernel has the lowest priority and is selected by the scheduler only when other processes are blocked. The IDLE process runs the HLT command repeatedly to disable most CPU functions to reduce power consumption. When receiving the interrupt signal, the CPU returns to the normal state. CPU in idle state will stop execution, that is, cut off the clock signal, CPU frequency will be instantly reduced to 0, power consumption will also be instantly reduced to 0. Since this idle state is short-lived, you will only see a drop in CPU frequency in task manager, not zero. When the CPU recovers from its idle state, the clock signal is switched on and the CPU frequency increases. So you’ll see CPU frequency fluctuations in the task manager.
The uptime command is used to check the load average
When the CPU completes the tasks assigned by the current system, to save power, the system will execute idle tasks, which execute HLT instructions in a loop. The CPU will stop the execution of instructions and put the CPU in the HALT state. Although the CPU stops the execution of instructions, some functional modules of the CPU will be shut down (with low power consumption). However, the CPU’s LAPIC (Local Advanced Programmable Interrupt Controller) does not stop working, meaning the CPU continues to receive external events such as interrupts and exceptions (in fact, the EXIT of the CPU HALT state is triggered by external events). Idle indicates the low-power state. The CPU is executing the lowest power cycle. Not doing nothing, but doing the easiest thing ever. When the CPU receives these external events, it will recover from the HALT state and execute the interrupt service function, and when the interrupt service function is finished, the instruction register (CS:EIP) will point to the next instruction of the HLT instruction, that is, the program after the CPU continues to execute the HLT instruction.