1. Computer bus and IO equipment

  • Computer bus
    • Overview of bus | to solve the problem of communication between different devices
      • Provides interfaces for external connections
      • Different devices can be connected through USB interface
      • The standard of connection promotes the unification of peripheral interfaces

      Example: USB | Universal Serial Bus | USB PCI Bus | Thunderbolt Bus card slot ISA Bus

    • Bus classification
      • On chip bus
        • The bus inside the chip
        • Register to register
        • Between register and controller and arithmetic unit
      • System bus is connected to the peripheral bus | | computer CPU, main memory, I/o devices, the information transmission between the various components
        • Data bus + two-way transmission of data information of each component
          • The bits of the data bus (the width of the bus, generally the same as the CPU bits [32 bits 64 bits]) is an important parameter of the data bus
        • The address bus
          • Specifies the memory address of the source or destination data
          • The bits of the address bus are related to the storage unit

          Address bus bit =n, address range :0 ~ 2^n

        • Control bus
          • A transmission line used to send various control signals
          • Control signals are sent from one component to another via the control bus
          • Can monitor state between different components (ready/not ready)
    • Bus mediation
      • To solve the problem of conflicting bus use by different components
      • Bus approach
        • Chain query
          • Advantages: low circuit complexity, simple arbitration mode
          • Disadvantages: Low priority devices have difficulty in obtaining the right to use the bus and are sensitive to circuit faults
        • Timer Query
          • The arbiter uses a counter to accumulate counts against the equipment number
          • Upon receipt of the quorum signal, a count is issued to all devices
          • If the number is consistent with the device number, the bus will be used
        • Independent request
          • Each device has a bus-independent connection mediator
          • The device can send/receive requests to the mediator separately
          • When more than one request signal is received at the same time, the arbitrator has the right to allocate the right of use according to priority
          • Benefits: Fast response time, priority order can change dynamically
          • Disadvantages: device connection, bus control complex
  • Input/output devices of a computer (IO devices)
    • Common I/O devices
      • Character input device

        Keyboard: membrane keyboard: there is a membrane connection inside the mechanical keyboard: each key has its own shaft

        According to paragraph sense sound pressure key path can be divided into: black axis red axis green axis tea axis

        Capacitive keyboard:

      • Image input equipment

        Mouse digital pad – input pad + pressure pen scanner

      • Image output equipment

        Display | CRT monitors, LCD projector printer

    • General design of input and output interfaces
      • Data line | is IO devices for data exchange between host, two-way transmission line | one-way cable wires
      • State line | IO device status report to the host of the signal wire | host query whether the equipment has been normal connection and ready | host query whether the equipment has been occupied
      • Command line | CPU to the device to send command line
      • Equipment selection line | host choice IO signal lines of equipment operate
    • CPU and I/o device communication | CPU speed do not agree with the IO device speed
      • Program interrupt
        • When the peripheral IO device is ready, an interrupt signal is sent to the CPU — the CPU has a dedicated circuit for the interrupt signal

        Provides an asynchronous way for slow devices to notify the CPU so that the CPU can operate at high speed and respond to slow devices

      • The DMA (direct memory access) | can improve the efficiency of the CPU
        • DMA directly connects main memory to IO devices
        • DMA works without the CPU

2. Computer memory

  • An overview of the computer’s memory
    • Classification of memory
      • Classified by storage media
        • Semiconductor memory | example: memory, U disk, SSD
        • Magnetic memory | example: tape disk
      • Classified by access mode
        • Random access memory (RAM) | random read, has nothing to do with the position
        • Serial storage | related to position, in order to find
        • Read-only memory (ROM) | read-only don’t write
    • The hierarchy of memory
      • Factors affecting the memory hierarchy
        • The faster the read and write speed, the better
        • The larger the storage capacity, the better
        • The lower the price, the better

        Capacity + Price => Bit price: price per bit

      • Cache | fast high prices
      • Main memory | speed moderate price is moderate
      • Auxiliary storage | slow low prices

      Cache – Main Memory Hierarchy – Principle: Locality principle | increase a layer between the CPU and main memory speed (small) capacity of the Cache | solved the problem of matching of the main memory and CPU speed Refers to when the CPU access memory locality principle, both access instructions and access to data, the storage unit to access all tend to be gathered in a small area in succession. Main memory – auxiliary storage hierarchy – locality principle | main memory addition to auxiliary storage (disk, SD card, U disk, etc.) | to solve the problem of insufficient capacity of main memory

  • The main and auxiliary storage of a computer

    Why does the computer power down and the memory data is lost but the disk data is not

    • Main Memory — RAM (Random Access Memory)
      • RAM through the capacitor stored data, it is necessary to refresh once in a while | if power, after a period of time will lose all the data
    • Secondary storage – disk
      • The surface is magnetized material with hard magnetic properties
      • Move the head radial motion to read track information
      • Disk track algorithm: first come, first service | | the shortest seek time preference scanning algorithm (elevator) | circular scanning algorithm
  • The high-speed memory of a computer
    • How caching works
      • Word: refers to the combination of binary codes that exist in a storage unit
      • Block: A group of words stored in contiguous storage units and considered as a unit
      • Hit ratio is an important performance metric to measure cache
      • Theoretically, the CPU can cache data every time, the hit ratio is 1
    • Cache replacement strategy
      • Random algorithm
      • First in first out (FIFO) algorithm
        • Think of the cache as a first-in, first-out queue
        • The first block to enter the queue is replaced first
      • Least Frequently Used Algorithms (LFU)
        • Preference is given to the least frequently used blocks
        • Extra space is required to record the frequency of word block usage
      • Least Recently Used Algorithm (LRU)
        • Blocks that have not been used in a period of time are preferentially eliminated
        • There are many ways to do this, usually using bidirectional linked lists
        • Put the current access node in front of the list (make sure the list header node is most recently used)

3. CPU of the computer

  • The instruction system of a computer
    • The form of machine instructions
      • Machine instruction mainly consists of two parts: operation code and address code
        • Opcode: indicates the operation to be completed by the instruction. The number of opcodes reflects the type of operation of the machine
        • Address code: directly give the address of the operand or operand, divided into three address instruction, two address instruction and one address instruction, zero address instruction

        Zero address instruction: there is no address code in machine instruction, empty operation, stop operation, interrupt return operation and so on

    • Operation type of machine instruction
      • Data transfer type: transfer between registers, between registers and storage units, and between storage units; Data read and write, exchange address data, zero set first operation
      • Arithmetic logic operation: addition, subtraction, multiplication and division between operands, and or not equal logical bit operation of operands
      • Shift operation: data is moved to the left (multiplied by 2), data is moved to the right (divided by 2), and necessary operations of data in the arithmetic logic unit are completed
      • Control instruction: wait instruction, stop instruction, empty operation instruction, interrupt instruction, etc
    • The way machine instructions are addressed
      • Instruction addressing: sequential addressing, jump addressing
      • Data addressing: immediate, direct, indirect
        • Immediately fast addressing | | address code digit limit scope of operand said: instruction directly obtain the operands – do not need to access memory
        • Direct addressing simple | | looking for operand address code digit limit operand addressing scope: operands are given directly in the main memory address – find a few simple operation, without calculating data address
        • Indirect addressing | operand addressing scope big | slower: instruction operand address code given address in the address – need to access one or more main memory to obtain the operand
  • Coordination and control of computer controller | computer running
    • The program counter | used to store the address of the next instruction, circulation constantly take instructions from the program counter, when instructions out of point to the next instruction
    • Timing generator | electrical engineering field for sending timing pulse, the CPU according to the different temporal pulse rhythmic work
    • Instruction decoder | controller, one of the main components of translation code corresponding to the operation and control transmission address code corresponding to the data
    • Various register | instruction register, main memory address register, main memory data registers, general purpose register | From main memory or cache access computer instructions, save the current CPU is about to access the address of the memory unit, save the current CPU is about to read the main memory data, used for temporary storage or transmission of data or instructions, can save the operation of ALU intermediate results, the capacity is larger than the general special register
    • Bus |
  • The computer arithmetic unit | used for data processing
    • Data buffer | | the input buffer output buffer input buffer peripherals sent the temporary storage of data, output data buffer to the temporary storage peripherals
    • ALU | arithmetic logic unit, is the main part in the arithmetic unit | common bit operations (move around, and or not, etc.) | arithmetic, etc.) (addition, subtraction, multiplication, and division
    • General purpose register | used to temporarily store or transmit data or instructions | can hold the intermediate results of ALU
    • Deposit status word register | operation condition (condition code plus or minus, carry, overflow, results, etc.) | deposit operation control information (debug tracking tags, allow the interrupt, etc.)
    • The bus
  • Instruction execution process
    • | take instructions from the slow access instruction To the instruction register
    • Analysis of instructions | decoder decoding signal control program counter + 1
    • Executes instructions | loading data to register ALU processing data record operation state Send operation result
  • Pipeline design of CPU
    • Greatly improve the overall UTILIZATION of CPU