Chapter 1 Basic knowledge

A computer has special wires, often called buses, that connect the CPU to other chips. Logically divided into: address bus, control bus, data bus.

The process of CPU and memory communication:

  • The CPU sends the address information through the address line;
  • The CPU sends memory read and write commands through the control line.
  • The memory sends the corresponding data to the CPU or stores the data in the corresponding position through the data line.

The width of the address bus determines the addressing capability of the CPU.

The width of the data bus determines the amount of data that can be transferred at a time.

The width of the control bus determines the ability of the CPU to control other components.

Memory chips are divided into random access memory (RAM) and read-only memory (ROM). When the CPU manipulates them, it treats them as a logical memory consisting of several storage units, which is called the memory address space.

Chapter II Registers

A typical CPU consists of an arithmetic unit, controller, register, etc., which are connected by an internal bus.

  • Information processing;
  • Register for information storage;
  • The controller controls the work of various devices;
  • The internal bus connects various devices and transmits data.

Registers are parts of the CPU that can be read and written by instructions. We control the CPU by changing the contents of registers.

8086CPU

The 8086CPU is a 16-bit CPU. It has the following structural features:

  • The computer can process up to 16 bits of data at a time;
  • Register maximum width bit 16 bits;
  • The path before the register and the arithmetic unit is 16 bits.

In other words, the maximum length of information that can be processed, transmitted, and temporarily stored in the 8086 is 16 bits.

The 8086CPU is a 16-bit architecture, but the address bus has 20 bits.

  • The related components in the CPU provide two 16-bit addresses, segment addresses and offset addresses;
  • The segment address and offset address enter the address adder through the internal bus and are synthesized into a 20-bit physical address.
  • The address adder sends the 20-bit physical address through the internal bus to the INPUT/output control circuit, and then to the address bus to the memory.

Physical address = Segment address ×16+\times16+×16+ offset address.

8086 machine memory address space allocation basic situation: 00000-9FFFF is the main memory address space; A0000-bffff is the video memory address space; C0000-fffff is a variety of ROM address space.

Segment register

The segment register is the part that provides the segment address in the CPU. The 8086CPU has four segment registers: CS, DS, SS, and ES, and data is not allowed to be directly sent into the segment register, and must be transferred by other registers.

Code segment register

CS is the code segment register and IP is the instruction pointer register. At any given moment, if the contents of CS are M and the contents of IP are N, the 8086CPU will start reading and executing instructions from the M×16+NM times16+NM×16+N unit of memory (or what CS:IP refers to). Therefore, the working process of 8086CPU can be described as follows:

  • Read the instruction from the memory unit pointed to by CS:IP and send the instruction to the instruction buffer;
  • IP=IP+ instruction length, thus pointing to the next instruction;
  • Execute the command and return to Step 1.

Initially, CS=FFFFH, IP=0000H, the instructions in the unit FFFF0H are the first instructions executed after the 8086PC is turned on.

The JMP directive is used to modify the contents of CS and IP.

Change CS and IP to JMP 2AE3:3. After the command is executed, CS=2AE3H, IP=0003H.

Change IP: JMP AX with a value in a register.

The Debug usage

R: View register; R a times X can change the value of A times X.

D: Check the memory. D E1:4320 Check the memory of the corresponding address and list 128 bytes from the address. D A:B C View the memory of segment A:B-A:C (B

e A:B x y z… : Modify and rewrite memory contents from A:B; Type could be asked to modify e A, B, after return from A: B began eight questions; Contents can be enclosed by “” to modify the contents of memory directly with a string.

U A:B: convert machine code in memory starting from A:B to assembly instructions; U A:B B: C

T: Execute instructions from CS:IP.

A A:B: Writes assembly instructions from a :B.

Chapter 3 Memory access to registers

Memory word storage: THE CPU register is 16 bits, because memory units are byte units (8 bits), so two address contiguous memory units are used to store a word, the word’s low byte is stored in the low address unit, the high byte is stored in the high address unit. Thus, the concept of word unit is proposed: a memory unit that stores a glyph data (16 bits), which is composed of two memory units with contiguous addresses. We call a word unit that starts at an address N the N address word unit for short.

Data segment register

DS Stores the segment address of the data that the CPU accesses.

mov bx,1000
mov ds,bx
mov al,[0]
Copy the code

The above code reads memory 1000:0 into AL. The same is true for storing data in registers into memory: mov [0],al.

You cannot directly store instant numbers in memory.

The addition of al and bl is only regarded as 8-bit addition, and the extra carry should be discarded.

The stack

The 8086CPU provides instructions to access the memory space as a stack, so a segment of memory can be used as a stack. The unit of the operation is word.

The top of the stack is the low address, and the bottom of the stack is the high address. The font data is pushed in accordance with the rules of normal storage of memory units.

push ax
pop ax
Copy the code

It pushes the data in AX and it pops the top element in AX.

Stack register

The segment registers SS and SP, SS:SP point to the top element of the stack. Push ax process:

  • SP=SP-2, pointing to the new top of the stack;
  • The data in AX is fed into the memory location pointed to by SS:SP.

During the stack push, the top of the stack grows from the higher address to the lower address.

When the stack is empty, SP points to the memory unit at the bottom of the stack.

The process of pop Ax:

  • Feed data from SS:SP into AX;
  • SP=SP+2, pointing to the top of the stack.

If 10000H~1FFFFH is regarded as a stack segment, SP=0 in the initial state.

Implement the mov ss,… The following instruction is immediately executed, and must be mov sp,… , this provision is convenient to control the size of the stack segment, to prevent subroutine call error.

Chapter IV assembler procedure

The executable contains two parts:

  • Programs (machine code translated from assembly instructions) and data (data defined in the source code);
  • Description information (program size, memory usage, etc.).

Assembler language source program, contains two kinds of instructions, assembler instructions and pseudo-instructions.

Tst.asm → compile (masm) \xrightarrow{compile (masm)} Compile (masm) tst.obj → Connect (link) \xrightarrow{connect (link)} Connect (link) tst.exe →command load into memory \xrightarrow{command load into memory}command load into memory

Shell of the operating system

There is a program in DOS, command.com, called the command interpreter, which is the shell of the DOS system. If the user wants to execute a program, he enters the name of the program. Command first finds the file, then loads it into memory, sets CS:IP to the entry of the program, and after that Command stops running and the CPU runs the program.

The process of loading the. Exe file in the DOS system

  • Find an adequate free memory area (starting address SA:0000) with an offset address of 0.
  • In the first 256 bytes of this memory area, a data area called the segment prefix (PSP) is created. DOS communicates with programs through the PSP.
  • Then load the program at the address SA+10H:0; (PSP area and program area physical address continuous, but segment address is different)
  • Store the segment address of the memory area into DS, and point CS:IP to the entry of the program.

So every time we load the program into memory, DS is 10 hours smaller than CS.