register

CPU computing speed is very fast. For performance purposes, the CPU creates a small temporary storage area and copies data from the memory to this small temporary storage area before performing operations. We call this small temporary storage area a register.

Common register

register describe
r0 – r30 A general-purpose integer register, 64-bit, which represents a 64-bit number when accessed using x0-x30; When accessed using W0-W30, the lower 32 bits of these registers are accessed
fp(x29) Save the stack frame address (bottom pointer)
lr(x30) Commonly known as the program link register, X30 holds the next instruction that needs to be executed after the subroutine ends
sp(x31) Save the stack pointer and use SP/WSP to access the SP register
PC The PC register holds the address of the currently executing instruction. In ARM64, software can’t overwrite PC registers
SPRs Registers are Registers that store Status identifiers. The Registers can be divided into The Current Program Status Register (CPSR) and The Save Program Status Register (SPSRs). Generally, CPSRS are used. When exceptions occur, CPSRS are stored in SPSRS. When the fault is rectified, copy the CPSR back
zr WZR/XZR is generally used, with w representing 32 bits and X representing 64 bits
v0 – v31 Vector registers, also known as floating-point registers, are 128 bits in size and can be accessed using Bn Hn Sn Dn Qn (8, 16, 32, 64, 128).

Common operation instructions

Operation instruction describe meaning
Mov x1, x0 Assign the value of register X0 to x1 Data transfer
Add x0, x1, x2 x0 = x1 + x2 add
Sub x0, x1, x2 x0 = x1 – x2 subtraction
Mul x0, x1, x2 x0 = x1 * x2 The multiplication
Sdiv x0, x1, x2 x0 = x1 / x2 division
And x0, x0, #0xF x0 = x0 & #0xF With the operating
ORR x0, x0, #9 X0 is equal to x0 or #9 Or operation
Eor x0, x0, #0xF x0 = x0 ^ #0xF Exclusive or operation
lsl x0, #1 x0<<1 The logical left 
add x0, x1, x2; // x1 + x2 = x0. sub sp, sp, 0x30; // add sp-30 to sp.cmp x11.# 4. Subs XZR, x11, #4// If x11-4 < 0, then nzCv.n = 1Copy the code

NZCV is several state values stored in the state register, respectively representing the states generated in the operation process, where:

  • N: negative condition flag, which generally indicates that the operation result is negative
  • Z, zero condition flag, the operation result is 0
  • C, carry condition flag, if the unsigned operation overflows, C=1.
  • V, oVerflow condition flag If the signed operation overflows, V=1.

Addressing the instructions

There are two types, deposit and withdrawal

Value commands start with L, such as Load Register (LDR) and Load Pair (LDP).

S is basically a Store instruction, such as STR (Store Register) and STP (Store Pair).

ldr x0,[x1] ; LDP x1,x2,[x10,#0x10] ; Fetch two 64-bit numbers from the address indicated by x10+0x10 and store them in x1 and x2 respectively
str    x5,[sp, # 24]; Write data to memory (offset positive), store x5 value (64-bit value) to address memory pointed to by SP +24
stur   w0,[x29, #0x8] ; Write data to memory (offset negative), store the value of w0 at x29-0x8
stp    x29,x30,[sp, # - 16]! ; Note: add x29, x30 to sp-16 and sp-=16
ldp    x29,x30,[sp],# 16. Run the following command to retrieve 16 bytes of data from sp address and store them in x29 and x30 respectively
Copy the code

Note: LDR can be used as either a pseudo-instruction to read an address or a memory access instruction. When the second parameter is preceded by “=”, it indicates a sham instruction. Otherwise, it indicates memory access instruction. The operands are all 32bits.

The addressing format is divided into the following three types:

[x10, #0x10] // Signed offset. That means the value is from the address of x10 plus 0x10
[sp, # - 16]! / / the pre - index. The value is set from the SP-16 address. After the value is set, writeback sp-16 to sp
[sp], # 16 / / post - index. The value is taken from the SP address. After the value is set, writeback sp+16 to sp
Copy the code

Jump instruction

Bl/B BL is a jump with a return; B is a jump with no return, and L of BL can also be understood as Lr

1. Saving LR means that you can return to this method to continue execution. Generally used for direct calls of different methods. 2.b Related jumps do not have LR and are generally jumps within this method, as shown inwhileCycle,if elseAnd so on.Copy the code

Jump – related directives also have a logical operation called condition code. With the status symbol in the status register to solid point. B. Ne, usually used if else. Common condition codes are the following:

Adrp instruction

adrp x0, x1

1. Change the value of 1 by 12 bits 1 0000 0000 0000 == 0x1000 2. Clear the lower 12 bits of the PC register 0x1045228B0 ==> 0x104522000 3. The results of 1 and 2 will be added to register X0Copy the code

Note: address is the address to the left of the PC register, adRP is to find the address range to get the parameter, and then the next PC register executes the code to locate the exact physical address. (Generally, after finding the range, the next sentence will add the specific address of the last three digits to determine the specific value).

The resources

Introduction to assembly

Ruan Yifeng – Assembly language introduction tutorial