Principle of microcomputer — Instruction system — Arithmetic operation instruction (ADD, ADC, SUB, SBB, INC, DEC, NEG, CMP, MUL, IMUL, DIV, IDIV, CBW, CWD, BCD adjustment)

C=A+B, C=A+B, C=A+B, C=A+B, C=A+B, C=A+B ADD the low order words first, and then use ADC to complete the carry addition of the high order words

data segment
   DVAR DD 00127654H;
   DVAR DD 00049821H; DVARC DD ? ; Stores the added value ends; Define data LEA DI,DVAR in data segment; MOV AX,4[DI]; The start address of the second low order word =DI+4AX ADD AX,[DI]; MOV WORD PTR DVARC,AX; Save the result of the low word MOV AX,6[DI];
ADC AX,2[DI]; With carry MOV DVARC+2,AX; Save the high level word of the resultCopy the code

Grammar points:

When to use WORD/BYTE PTR in assembly

Pseudoinstruction DD DW DB

(3) SUB DST, SRC without borrowing subtraction instruction

Function: Subtract two operands and send the result back to DST.

Completed operations: DST← dst-src

(4) SBB DST, SRC with borrowing subtraction instruction

Function: similar to SUB, but the current value of CF should be subtracted when subtracting.

Completed operations: DST← dst-src-cf

Syntax format: SUB (SBB) reg/mem, reg/mem/imm

DST and SRC can be storage or registers, butCannot be both memory. The result of the operation affects the flag bit.

Instruction format: CMP OPR1, OPR2; Opr1-opr2 Result Affects the flag bit. Syntax format: CMP REg/meM, reg/ meM/IMM function: compare two numbers, and perform opR1-OPR2 operation as subtraction instruction, but do not send back the result after subtraction, only modify the flag bit according to the subtraction result. OPR1 and OPR2 can be memory or register, not memory at the same time. OPR2 can also be immediate number, and the operation result has an effect on the flag bit. There are three possible results: AX>BX, AX

CF=1 subtraction with the highest significant bit borrowed from the high (AX

(1) Unsigned number multiplication instruction MUL

Format: MUL SRC; (AX) (AL) × (SRC) byte multiplication

(DX,AX) (AX) × (SRC) word multiplication

Syntax: MUL reg/ meM

Requirement: In byte operations, the destination operand (multiplicand) (implied instruction) must be an accumulatorALWhen doing the multiplication operation, we should set the multiplicand first, that is, the multiplicand product are implicit forms, the multiplicand and the multiplicand are unsigned numbers, and the product is stored in the registerAXIn the. When performing word operations, the destination operand must be an accumulatorAX, the product is in the registerDX.In the AX. The source operandsImmediate numbers are not allowed.

Schematic diagram:



(2) Sign number multiplication instruction IMUL

Format: IMUL SRC; (AX) (AL) × (SRC) bytes

; (DX, AX) (AX) × (SRC)

Syntax: IMUL reg/ MEM

Note: The operation is the same as unsigned multiplication

The effect on the flag bit can be similarly compared.

Example: MOV AL 66H; AL MOV BL 88H; Multiplier send BL MUL BL; Unsigned multiplication, AL×BL result stored in AX MOV AX, 6666H; AX MOV BX, 4567H; Multiplier (word) send BX MUL BX; The resulting high word is in DX and the low word is in AX

When to use signed and unsigned?

The conditions for the use of MUL and IMUL instructions are determined by the attributes of the numbers (determined by the programmer himself).

For example, if (1111111111b) x (11111111B) is an unsigned number, the value is 255 x 255=65025.

For signed numbers, it is (-1) × (-1) =1, so it decides which instruction to choose according to the format of the multiplier to be phase.

Influence on flag bit:

The result of the multiplication instruction operation affects the status flag, but it doesCF and OF have special definitions.



Words are multiplied by bytes:

MOV AL,15H;

CBW; CBW = convert byte to wordThe logical meaning is that the sign of al extends to ah

The basic function of section extension CBW is (AH) =00H when the most significant bit of (AL) is 0. AH) =FFH, when the most significant bit of (AL) is 1

MOV BX,0FB78H;

IMUL BX;

(3) Unsigned division instruction DIV (dividend and result implied)

Format: DIV SRC; The quotient of (AL) (AX)/(SRC) division

Byte operation (AH) (AX)/(SRC) division remainder

The quotient of the word operation (AX) (DX, AX)/(SRC) division

(DX) (DX, AX)/(SRC) remainder of the division

(4) Signed division instruction IDIV (dividend and result implied)

Format: IDIV SRC; The quotient of (AL) (AX)/(SRC) division

Byte operation (AH) (AX)/(SRC) division remainder

The quotient of the word operation (AX) (DX, AX)/(SRC) division

(DX) (DX, AX)/(SRC) remainder of the division

Image means:

== 需要注意点：==

1) If the divisor is 0, a type 0 interrupt is generated.

2) The operation result of division instruction does not define the status flag.

3) When the division instruction requires word operation,The dividend must be 32 bits, the divisor is 16 bits, and the quotient and remainder are 16 bits; In byte manipulation,The dividend must be 16 digitsThe divisor is 8 bits, and the quotient and remainder are 8 bits. (The dividend must be greater than the divisor).

4) Signed and unsigned division to complete the same operation, but when the signed division is done, the operand is signed, the resulting quotient and remainder are also signed, the remainder of the sign is the same as the dividend sign.

When I started writing this kind of instructions, I felt a little confused. After reading this article, I felt a little better. I suggest that I read this article first and then go down to understand the specific instructions. www.elecfans.com/dianzichang… BCD code: A 4-bit binary code representing a 1-bit 10-bit number. It’s not the same as binary code, and we need to fix it to get the right result. BCD can be divided into two types: 1) separated BCD code: 8-bit register contains one BIT BCD code (non-compressed BCD) 2) combined BCD code: 8-bit register contains two bits BCD code (compressed BCD) 1) Addition adjustment instruction AAA DAA AAA — adjust the addition result of non-compressed BCD number in AL; 2. Observe AF AF has carry, then AH=1, CF=1, AF= L; AF has no carry, then AH=0, CF=0, AF=0. 3. The top 4 of AL in Qing Dynasty

DAA — Adjust the sum of two compressed decimal numbers in AL to get the compressed decimal and; Specific operation: +6 correction was made to the lower 4 bits and the higher 4 bits of the sum result AL respectively. The impact on flag bit is equivalent to the difference between compressed BCD and uncompressed BCD by ADD instruction. Compressed BCD code uses one byte to represent two-digit BCD code, the high one to represent ten-digit BCD code, and the low one to represent single-digit BCD code, which is called compressed BCD code. For example, the decimal number 56 is represented by the compressed 8421BCD code as 0101 0110. The uncompressed BCD code is represented by one byte as a BCD code. The high and low levels are 0 and BCD codes respectively. For example, the decimal number 5 is expressed as 0000 0101 in an uncompressed 8421BCD code

; ASCII code is obtained through keyboard input, which is regarded as separate BCD code, then high4Bits are invalid parts and therefore do not need to be cleared. MOV AL,34H; BCD is a decimal number34
MOV BL,28H; BCD is a decimal number28ADD AL.BL; ; Before that, (AL) is equal to5CH, (add in binary) DAA; ; After that, delta of AL is equal to62H (convert to BCD code)Copy the code

2. Subtraction adjustment instruction AAS DAS AAS — Adjust the subtraction result of non-compressed BCD number in AL; The low level AL of uncompressed BCD code is subtracted by 6 to observe whether AF has borrowed, CF=1, AF= L; AF has no borrowing, CF=0, AF=0. DAS — Adjust the difference between two compressed decimal numbers in AL by subtracting them to get the compressed decimal difference; The high order AH and low order AL of compressed BCD code are reduced by 6. The effect on the flag bit is the same as the SUB instruction. Q: Operations to calculate decimal numbers: 5-9

; ASCII code is obtained through keyboard input, which is regarded as separate BCD code, then high4Bits are invalid parts and therefore do not need to be cleared. MOV AL,05H; BCD is a decimal number5
MOV BL,09H; BCD is a decimal number9
SUB AL.BL;
AAS
Copy the code

Q: Operations to calculate decimal numbers: 31-87

; ASCII code is obtained through keyboard input, which is regarded as separate BCD code, then high4Bits are invalid parts and therefore do not need to be cleared. MOV AL,31H; BCD is a decimal number5
MOV BL,87H; BCD is a decimal number9
SUB AL.BL;
DAS
Copy the code

AAM AAM — Adjust the result of multiplying two ASCII uncompressed decimal numbers in AX; Adjustment method: Divide the result (AL) by 10 to obtain the lower four bits of (AH) and the remainder of the lower four bits of (AL) q: Calculate the decimal operation: 78*

; ASCII code is obtained through keyboard input, which is regarded as separate BCD code, then high4Bits are invalid parts and therefore do not need to be cleared. MOV AL,7;		
MOV BL,8;	
MUL BL;
AAM
Copy the code

AAM AAD — Adjust the ASCII uncompressed decimal number in AX before the division instruction; Adjustment method :(AL)=(AH)*10+(AL); With (AH) =0, the next operation is normal division.

Q: Operation to calculate decimal numbers: 274*

; ASCII code is obtained through keyboard input, which is regarded as separate BCD code, then high4Bits are invalid parts and therefore do not need to be cleared. MOV AX,0207H;		
MOV BL,4; AAD ; (AX)<-001BH
DIV BL;
Copy the code

In conclusion, instructions that are classified into two categories because of the type of BCD are essentially the same, in which addition, subtraction, and multiplication are all modified by some operation from binary to BCD form. Division operates on the dividend, which requires special attention

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