First: operating system principle series operating system preliminary understanding

Types of logical structures

  • Integral structure

Build with modules as the basic unit The characteristics of: Independent module design, coding, debugging, free call between modules, module communication is mostly completed in the form of global variables

Disadvantages: Information transfer at will, maintenance and update difficult

  • Hierarchical structure

For example, in the TCP/IP protocol stack, all function modules are arranged in multiple layers according to the call order, and only one-way dependencies or one-way calls exist between adjacent layers

Layering principles: hardware dependence (lowest layer), external features (outermost layer), intermediate layer (order of invocation or order of information transfer), common services (lower layer), active layer (lower layer)

Advantages: clear structure, avoid circular call, the whole problem is localized, the correctness of the system is easy to ensure, conducive to the maintenance of the operating system, expansion, transplantation

  • Microkernel structure (B/S,C/S)

Operating system = microkernel + external server microkernel: small enough to provide the most basic core functions and services of the OS, generally used to implement hardware-related processing, to achieve some basic functions responsible for communication between the client and the server

External server: performs most of the OS service functions and waits for applications to make requests. It is composed of multiple servers or processes and runs in user mode in the form of processes

The CPU state

The most basic hardware structure that supports an operating system

CPU, memory, interrupt, clock

The CPU state

CPU operating status, description of resource and instruction permissions

The classification of the state

Nuclear: Ability to access all resources and execute all hypervisor /OS kernels

User mode (user mode) : can access only some resources, other resources are limited, user program

Tube state: between the core state and user state

Conversion between user state and core state
  • Transition from user state to core state

The user requests the OS to provide services

Send the interrupt

The user process has an error

The user mode attempted to execute the privileged instruction

  • The case of transition from nuclear state to user state

Interrupt return

Hardware and OS observations of CPU

Hardware identifies CPU states by state

The OS distinguishes CPU states by processes

Intel CPU state

The Intel CPU has four privilege levels: RING0,RING1,RING2, and RING3. Windows uses only two levels of RING0 and RING3. RING0 is only used by operating systems, and RING3 is used by anyone. If a normal application attempts to execute a RING0 instruction, Windows displays an “illegal instruction” error message. Ring0 indicates the CPU running level. Ring0 is the highest level, followed by Ring1, and ring2…

Procedure A checks permission when accessing procedure B. Request privilege descriptor privilege level

memory

A unit that stores programs and data

Classification: by memory (semiconductor memory) read and write working mode RAM ROM

By storage element material Semiconductor memory (common main memory) Magnetic memory (disk, tape) optical memory (CD)

Follow the association with the CPU

Main storage: directly exchanges information with the CPU Secondary storage: Cannot directly exchange information with the CPU

Ideal storage system

Large speed, large capacity, low cost

Physical storage system
  • register
  • cache
  • Main memory
  • Auxiliary storage

Working principles of a tiered storage system

The order in which the CPU reads instructions or data

1) Access cache (hit,hit)

2) Access memory (MISS, MISS)

3) Access secondary storage (missing page, PAGE_FAULT)

The interrupt mechanism

Definition: a process or mechanism by which the CPU responds to a sudden external event. When the CPU receives an external signal (interrupt signal), it stops working, switches to the external event, and returns to the original work break point (breakpoint) after processing. The occurrence of the event changes the control flow of the processor

The difference between interrupts and exceptions is passive and active Schematic of interrupt response process:Interrupt vector table: a table consisting of interrupt vectors, which are a memory unit, storedInterrupt handler entry addressandThe processor status word required by the program to run

Purpose: To realize concurrent activities, real-time processing, automatic fault processing Interrupt source: the event that causes the system interruption is called the interrupt source

Interrupt types: forced interrupts (the program is not expected) and voluntary interrupts (the program is expected), external interrupts and internal interrupts

Breakpoint: The place where the program breaks and the address (CS:IP) at which the next line of instruction is to be executed

Site: the information set on which the program runs correctly. There are two processing processes for the site. One is the protection of the site: before entering the interrupt service program, stack; the other is the recovery of the current data, after exiting the interrupt service program

Essence: switching instruction execution addresses, switching CPU states, working for field protection and recovery, and parameter passing (communication)